1. Field of the Invention
The present invention relates in general to a process for bonding a semiconductor chip to a substrate and, more particularly, to a chip bonding process for bonding a flip chip, that has a bump on its bond pad, to the substrate while turning the flip chip over to direct the bump surface of the chip downward.
2. Description of the Prior Art
FIGS. 1A to 1F show a typical process for bonding a flip chip 1 to a substrate 30. As shown in the drawings, the typical chip bonding process is started by a flip chip forming step. In the flip chip forming step, a gold (Au) bump 20 is formed on the aluminum bond pad 11 of a semiconductor chip 10 thereby forming the flip chip 1 as shown in FIGS. 1A to 1C. The flip chip forming step is followed by an electrical contact step. In the above electrical contact step, the flip chip 1 is placed relative to the substrate 30 such that the gold bump 20 of the chip 1 is aligned with a lead finger 31 of the substrate 30. The gold bump 20 is, thereafter, bonded to the lead finger 31 using a reflow process as shown in FIG. 1D. Thereafter, an underfilling step is carried out. In the above underfilling step, epoxy 40 is injected from the edge of the semiconductor chip 10 in order to fill the gap between the chip 10 and the substrate 30 as shown in FIG. 1E. The epoxy 40 in the gap between the chip 10 and substrate 30 not only relieves thermal stress of the chip 1, it also protects the electrical contact between the semiconductor circuit and chip 10 and the substrate 30. The underfilling step is followed by a curing step. In the above curing step, both the flip chip 1 and the substrate 30 with the epoxy 40 charged in the gap therebetween is put in an oven prior to permanently curing the epoxy 40 in the oven as shown in FIG. 1F.
However, the above chip bonding process has the following problems. That is, since the epoxy 40 is injected from the edge of the chip 10, the air in the gap between the chip 10 and substrate 30 fails to be completely degassed. In this regard, voids may form in the epoxy 40. In addition, it is difficult to relieve the thermal stress applied to the gold bump 20 during and just after the flip chip bonding process. The above thermal stress may cause deformations or cracks on the bump 20 thereby reducing the quality of the resulting semiconductor packages and reducing the production yield of the packages.
In accordance with another typical embodiment, optical-curing resins may be applied to the substrate by a dispenser after the flip chip forming step. After applying the optical-curing resins, the bump of the semiconductor chip is aligned with the electrode of the substrate prior to radiating ultraviolet rays to the resins while compressing the chip with a compressing jig, thereby curing the optical-curing resins.
However, the above chip bonding process according to the other typical embodiment has the following problems. That is, the optical-curing resins are applied to the substrate by the dispenser under different resin applying conditions, so the thickness of the optical-curing resins at the edge of the semiconductor chip is not uniform. Therefore, neither the deposited state of the optical-curing resins nor the height of the resins from the substrate's surface at different positions can be uniformed. The semiconductor chip thus comes into contact with the optical-curing resins having the different state and height as the chip and substrate are compressed together by the compressing jig. Therefore, the air between the bump of the semiconductor chip and the substrate cannot be completely degassed but remains in the optical-curing resins thereby forming voids in the resins after optically curing the resins. Such voids may cause cracks in the chip, reducing the quality of the resulting semiconductor packages.